Saurabh Saxena
Assistant Professor
+91-44 2257 4457 (Work)
Publications - 42Publications - 42
Publications - 42Personal profile
I am an assistant professor in the VLSI group of the department of Electrical Engineering of the Indian Institute of Technology Madras. I graduated with Ph.D. in Electrical & Computer Engineering from University of Illinois at Urbana-Champaign in 2015. At UIUC, I worked with Integrated Circuits and Systems Group under the guidance of Prof. Pavan Kumar Hanumolu. During Ph.D. I focussed on architectural and circuit level techniques for energy efficient high speed serial links. Between 2009 and 2011, I worked as a research assistant under guidance of Prof. Kartikeya Mayaram and Prof. Terri Fiez in the department of Electrical Engineering & Computer Science at Oregon State University. Here I designed high speed discrete-time delta sigma modulators for baseband applications. I graduated with B.Tech. and M.Tech. in Electrical Engineering, under dual degree program in IIT Madras, in 2009.
Publications (42)View all
ConferencesA 2.25 GHz PLL with 0.05-2 MHz Inloop Phase Modulation and -70 dBc Reference Spur for Telemetry Applications2023 | IEEE Computer Society- ConferencesA 105-525MHz Integer-N Phase-Locked Loop in Indigenous SCL 180nm CMOS2023 | IEEE Computer Society
- ArticlesA 1.12-1.91 mW/GHz 2.46-4.92 GHz Cascaded Clock Multiplier in 65 nm CMOS2022 | Institute of Electrical and Electronics Engineers Inc.
- ConferencesA 5-Gb/s PAM4 Voltage Mode Transmitter with Current Mode Continuous Time Linear Equalizer2022 | Institute of Electrical and Electronics Engineers Inc.
- ArticlesA 2.5-5.0-GHz Clock Multiplier With 3.2-4.5-mUIrmsJitter and 0.98-1.06 mW/GHz in 65-nm CMOS2022 | Institute of Electrical and Electronics Engineers Inc.
Network (5)View all
