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38 Publications
20 Journals
Vinita Vasudevan
Professor
Department of Electrical Engineering
vinita@iitm.ac.in (Work)
+91-44 2257 4442 (Work)
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Publications - 38
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Publications (38)
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Publications (38)
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Journal
Optimization of Signal Processing Applications Using Parameterized Error Models for Approximate Adders
Vinita Vasudevan
,
Dharmaraj C.
and
Nitin Chandrachoodan
2021 | Association for Computing Machinery
Articles
Sparse artificial neural networks using a novel smoothed LASSO penalization
Vinita Vasudevan
2019 | Institute of Electrical and Electronics Engineers Inc.
Articles
Potential Critical Path Selection Based on a Time-Varying Statistical Timing Analysis Framework
Vinita Vasudevan
2019 | Institute of Electrical and Electronics Engineers Inc.
Conferences
Optimizing power-accuracy trade-off in approximate adders
D. Celia
,
Vinita Vasudevan
and
Nitin Chandrachoodan
2018 | Institute of Electrical and Electronics Engineers Inc.
Conferences
Probabilistic Error Modeling for Two-part Segmented Approximate Adders
D. Celia
,
Vinita Vasudevan
and
Nitin Chandrachoodan
2018 | Institute of Electrical and Electronics Engineers Inc.
Articles
A hierarchical technique for statistical path selection and criticality computation
Vinita Vasudevan
2017 | Association for Computing Machinery
Articles
A Skew-Normal Canonical Model for Statistical Static Timing Analysis
Vinita Vasudevan
2016 | Institute of Electrical and Electronics Engineers Inc.
Articles
Efficient algorithms for discrete gate sizing and threshold voltage assignment based on an accurate analytical statistical yield gradient
Vinita Vasudevan
2016 | Association for Computing Machinery
Conferences
An efficient algorithm for statistical timing yield optimization
Vinita Vasudevan
2015 | Institute of Electrical and Electronics Engineers Inc.
Articles
An efficient algorithm for frequency-weighted balanced truncation of VLSI interconnects in descrIPtor form
Vinita Vasudevan
and
M Ramakrishna
2015 | Institute of Electrical and Electronics Engineers Inc.
Articles
Statistical criticality computation using the circuit delay
Vinita Vasudevan
2014 | Institute of Electrical and Electronics Engineers Inc.
Conferences
Statistical static timing analysis using a skew-normal canonical delay model
Vinita Vasudevan
2014 | Institute of Electrical and Electronics Engineers Inc.
Conferences
On the computation of criticality in statistical timing analysis
Vinita Vasudevan
2012
Articles
Analysis of clock jitter in continuous-time sigma-delta modulators
Vinita Vasudevan
2009
Articles
Open Access
Mapping data-parallel tasks onto partially reconfigurable hybrid processor architectures
Vinita Vasudevan
2006
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Conferences
Open Access
Scheduling divisible loads on partially reconfigurable hardware
Vinita Vasudevan
2006
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Articles
A new technique for on-chip error estimation and reconfiguration of current-steering digital-to-analog converters
K. P Sunil Rafeeque
and
Vinita Vasudevan
2005
Articles
Open Access
Rate-distortion estimation for fast JPEG2000 compression at low bit-rates
Vinita Vasudevan
2005
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Conferences
Simulation of the effects of timing jitter in track-and-hold and sample-and-hold circuits
Vinita Vasudevan
2005
Articles
Hardware-software co-simulation of bus-based reconfigurable systems
Vinita Vasudevan
2005
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