Pulses can be stretched in time by driving them into a filter whose group delay is more than the pulse duration and increasing the time constants of the filter. The stretched pulse can be digitized using a slow analog to digital converter, effectively realizing a high sampling rate for the input signal. This can be used for digitizing short bursts at high speed. The effect of clock jitter is reduced due to the reduced slope of the signal. High order Bessel allpass filters provide a maximally flat group delay and are suitable for this application. © 2011 IEEE.

Nagendra Krishnapura

Department of Electrical Engineering

all-pass filter

Analog to digital converters

CLOCK-JITTER

FAST DIGITIZATION

HIGH ORDER

Input signal

MAXIMALLY FLAT

Pulse durations

Sampling rates

SHORT BURSTS

Time constants

TIME STRETCHING

Analog to digital conversion

Delay circuits

Jitter

Group delay

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IIT Madras

Electronic time stretching for fast digitization

Proceedings - IEEE International Symposium on Circuits and Systems

This paper demonstrates a completely on-chip implementation of expansion and compression of continuous-time, wideband, analog pulses. The input pulse is fed to a continuous-time filter whose delay exceeds the pulse duration. Once the pulse is completely inside the filter, it is stored in the form of the filter's state-variables, which can completely reconstruct the pulse. Instantaneously decreasing or increasing the filter's bandwidth at this instant results in the output pulse being expanded or compressed, respectively, compared with when the bandwidth is unchanged. A 1.6 mm2, 370 mW, 0.13 μ text{m} prototype has a delay filter whose bandwidth can be switched between 870 and 472 MHz. It achieves 1.8\times pulse expansion and 1.7\times pulse compression with an rms error which is 33 dB below the peak-peak pulse amplitude. © 2004-2012 IEEE.

IEEE Transactions on Circuits and Systems I: Regular Papers

Expansion and compression of analog pulses by bandwidth scaling of continuous-time filters

We propose a circuit technique that enables the realization of widely programmable high-frequency active RC filters in CMOS technology. A fifth-order Chebyshev ladder filter having a digitally programmable 3-dB bandwidth (from 44 to 300 MHz) is used as a vehicle to validate our ideas. The opamp uses feedforward compensation for achieving high dc gain and wide bandwidth. The integrating resistors are realized as a series combination of a triode-operated MOSFET and a fixed polysilicon resistor. A charge-pump-based servo loop servoes the integrating resistor to a stable off-chip resistor. The principle of "constant capacitance scaling"is applied to the opamp and the integrating resistors so that the shape of the frequency response is maintained when the bandwidth is scaled over a 7 7times; range. The filter core, designed in a 0.18-μm CMOS process, consumes 54 mW from 1.8-V supply and has a dynamic range of 56.6 dB. © 2009 IEEE.

Widely programmable high-frequency active RC filters in CMOS technology

Applied Physics Letters

Time stretch enhanced recording oscilloscope

IEEE Journal of Solid-State Circuits

Widely programmable high-frequency continuous-time filters in digital CMOS technology

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Time-scaled electrical networks. Properties and applications in the design of programmable analog filters

A 700-MHz switched-capacitor analog waveform sampling circuit

Journal	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN	02714310
Open Access	No