Header menu link for other important links
X
Measuring area-complexity using Boolean difference
Ankit Kagliwal,
Published in
2013
Pages: 245 - 250
Abstract
For a combinational circuit, area-complexity is a measure that estimates the logic area of the circuit without mapping to logic gates. Several measures like literal count, number of primary input/outputs, etc. have been used in the past as area-complexity metrics. In this paper, we propose a novel area-complexity measure using the theory of Boolean difference and Taylor expansion for Boolean functions.We demonstrate how to capture the area-complexity of a Boolean function using the complexity of its Boolean derivatives. We evaluate the metric on circuits from MCNC benchmark suite and a sizeable collection of randomly generated circuits. We compare our metric with existing techniques based on literal-count and BDD properties. We show that the new area-complexity measure is accurate within 10% of the actual number of gates synthesized using ABC as opposed to at least 100% and 15% for the metrics based on literal-count and BDD properties respectively. We also show the robustness of our metric across three different gate-libraries. © 2013 IEEE.
About the journal
JournalProceedings of the IEEE International Conference on VLSI Design
ISSN10639667
Open AccessNo
Concepts (11)
  •  related image
    AREA-COMPLEXITY
  •  related image
    Benchmark suites
  •  related image
    BOOLEAN DERIVATIVES
  •  related image
    BOOLEAN DIFFERENCE
  •  related image
    Logic synthesis
  •  related image
    NUMBER OF GATES
  •  related image
    PRIMARY INPUTS
  •  related image
    TAYLOR EXPANSIONS
  •  related image
    Boolean functions
  •  related image
    Embedded software
  •  related image
    Embedded systems