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A hardware-architecture for control-law based Voronoi diagram computation and FPGA implementation
Published in
2008
Abstract
Map-making is a challenging task when the environment is unknown and the collected information is local. This paper presents the design of a hardware architecture for sensor-based map construction in a planar environment. In particular, the map is a Voronoi diagram of the environment. The Voronoi construction is based on a control law. Features of the proposed architecture are absence of arithmetic operations expensive in digital hardware and a planning algorithm for completing the map. Also, the implementation of control-law uses look-up tables and reuse of CORDIC module to avoid matrix multiplications. A highly area-efficient FPGA implementation of the architecture is also reported. Experiments with an FPGA-based robot confirm the effectiveness of the proposed approach.
About the journal
JournalIEEE Region 10 Annual International Conference, Proceedings/TENCON
Open AccessNo
Concepts (15)
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    Area-efficient
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    ARITHMETIC OPERATIONS
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    Control laws
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    DIGITAL HARDWARES
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    Fpga implementations
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    Hardware architectures
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    Look-up tables
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    Matrix multiplications
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    Planning algorithms
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    Proposed architectures
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    VORONOI CONSTRUCTIONS
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    Voronoi diagrams
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    Mapping
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    Table lookup
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    Field programmable gate arrays (fpga)