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A built-in-self-test scheme for digital to analog convertersPublished in
2004
Volume: 17
Pages: 1027 - 1032
This paper describes a new Built-In-Self-Test(BIST) scheme for estimation of static non-linearity errors in digital to analog converters (DACs). The BIST scheme measures each transition and estimates non-linearity errors. It makes use of a sample and subtract circuit and a VCO. The circuit is designed using 0.35μm CMOS technology from AMS. The simulation results are included in this paper. Errors estimated using the BIST scheme simulation match well with measured errors.
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About the journal
| Journal | Proceedings of the IEEE International Conference on VLSI Design |
|---|---|
| ISSN | 10639667 |
| Open Access | No |
Authors (1)
Vinita Vasudevan- A hierarchical technique for statistical path selection and criticality computation
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Concepts (14)
BUILT-IN-SELF-TEST (BIST)- Control logic
- GAIN AMPLIFIERS
- SYSTEM ON CHIP (SOC) DESIGN
- Analog computers
- Approximation theory
- Cmos integrated circuits
- Computer simulation
- Electric switches
- Error analysis
- Sensitivity analysis
- Spurious signal noise
- Variable frequency oscillators
- Digital to analog conversion
