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A 10 Gbps eye opening monitor in 65nm CMOS
, Sandeep Krishnan
Published in Institute of Electrical and Electronics Engineers Inc.
Volume: 2015-July
Pages: 3028 - 3031
Monitoring the eye diagram at the output of an embedded analog adaptive equalizer used in a high speed serial link is challenging. Eye measurement using an external oscilloscope is problematic due to the bandwidth of the test setup. In this work, we describe the working principle and design details of a low cost, on-chip monitor circuit that enables the determination of the eye diagram. The eye opening monitor (EOM), implemented in a 65 nm CMOS process, occupies 0.06 mm2 and consumes 5.7 mW from a 1.2 V supply. Measurements demonstrate the efficacy of our techniques. © 2015 IEEE.
About the journal
JournalData powered by TypesetProceedings - IEEE International Symposium on Circuits and Systems
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.
Open AccessNo
Concepts (10)
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    Networks (circuits)
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    65NM CMOS
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    Adaptive equalizer
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    Cmos processs
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    High speed serial links
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    Test setups
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    Cmos integrated circuits