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Parallel algorithm to construct Voronoi diagram and its VLSI architecturePublished in IEEE, Piscataway, NJ, United States
1999
Volume: 3
Pages: 1683 - 1688
This paper presents a parallel algorithm for computing the Voronoi diagram for collision-free path planning of robots. The algorithm constructs the Voronoi diagram on a binary image of the workspace and is based on the Euclidean distance function. It has been implemented in ANSI-C on an HP workstation. The algorithm is suitable for VLSI implementation in a cellular architecture. Such an architecture is described. Comparisons with an existing algorithm are also presented.
Topics: Voronoi diagram (69)%69% related to the paper, Bowyer–Watson algorithm (65)%65% related to the paper, Centroidal Voronoi tessellation (65)%65% related to the paper, Lloyd's algorithm (64)%64% related to the paper and Parallel algorithm (61)%61% related to the paper
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About the journal
| Journal | Data powered by TypesetProceedings - IEEE International Conference on Robotics and Automation |
|---|---|
| Publisher | Data powered by TypesetIEEE, Piscataway, NJ, United States |
| ISSN | 10504729 |
| Open Access | No |
Authors (1)
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