Dynamic obstacles present a challenge for navigation of mobile robots. Estimation of the velocity of dynamic obstacles helps in collision avoidance. In this paper, we propose a hardware-efficient approach for velocity estimation that is appropriate for FPGA-driven mobile robots. The proposed approach is based on a novel approximate radix-4 CORDIC algorithm with low latency. The new CORDIC requires at most four iterations for convergence and has very low area requirement. Using the proposed CORDIC, we present an iterative method for velocity estimation. The velocity estimation scheme achieves roughly 87% reduction in slice-delay product compared to a direct algebraic approach (that uses multipliers). Experiments with an FPGA-based robot are reported. © 2018 IEEE.

Krishnamurthy Sridharan

Department of Electrical Engineering

Experiments

Industrial electronics

Iterative methods

Mobile robots

velocity

ALGEBRAIC APPROACHES

DELAY PRODUCT

DYNAMIC OBSTACLES

FPGA implementations

RADIX-4

RADIX-4 CORDIC ALGORITHMS

Robot navigation

VELOCITY ESTIMATION

Field programmable gate arrays (FPGA)

IIT Madras is a public technical and research university located in Chennai, Tamil Nadu. Founded in 1959, it is recognised as an Institute of National Importance.

IIT Madras has been ranked as the top engineering institute in India for four years in a row by the National Institutional Ranking Framework of the MHRD

It currently offers undergraduate, postgraduate and research degrees across 16 disciplines in Engineering, Sciences, Humanities and Management. About 596 faculty belonging to science and engineering departments and centres of the Institute are engaged in teaching, research and industrial consultancy.

IIT Madras

Hardware-Efficient Velocity Estimation of Dynamic Obstacles Based on a Novel Radix-4 CORDIC and FPGA Implementation

Proceedings: IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society

Vector rotation is an important component of algorithms in digital signal processing and robotics. Often, the rotation does not require very high accuracy. This study presents a lowoverhead sign-precomputation-based architecture for approximate rotation using the coordinate rotation digital computer (CORDIC) algorithm. The proposed architecture is independent of Z-datapath, and involves precomputation of the direction of rotation for each micro-rotation angle. The approach involves selecting the optimal micro-rotation angles from a set of elementary angles in run time. Careful selection and elimination of the redundant micro-rotation angles leads to a maximum of three iterations for a majority of the input angles while also simultaneously reaching within 0:45 (of the desired rotation angle). An field programmable gate array (FPGA) implementation of the proposed rotation mode CORDIC on XC7K70T-3FBG676 Kintex-7 using Xilinx ISE 13.2 achieves roughly 50% reduction in slice-delay product and power-delay product compared to recent designs. An application of approximate rotation to Hough transform-based lane detection is presented. An efficient algorithm for generation of vote addresses in the parameter space is proposed. It is shown that accurate lane detection is possible along with resource savings using the proposed CORDIC. The proposed architecture reduces the number of additions roughly by a factor of 20 compared with the conventional method of computing a parameter for each feature point. © The Institution of Engineering and Technology 2018.

IET Circuits, Devices and Systems

Precomputation-based radix-4 CORDIC for approximate rotations and Hough transform

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

A Fast and Low-Complexity Operator for the Computation of the Arctangent of a Complex Number

IEEE/ASME Transactions on Mechatronics

Development of a New Robust Controller With Velocity Estimator for Docked Mobile Robots: Theory and Experiments

IECON 2016 - 42nd Annual Conference of the IEEE Industrial Electronics Society

Robot navigation according to the characteristics of pedestrian flow

IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society

Industrial electronic control: FPGAs and embedded systems solutions

Hardware-efficient velocity estimation of dynamic obstacles based on a novel radix-4 cordic and FPGA implementation

Journal	Data powered by TypesetProceedings: IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society
Publisher	Data powered by TypesetInstitute of Electrical and Electronics Engineers Inc.
Open Access	No