We consider the problem of finding a feasible path for a mobile robot from one point to another that avoids collisions with objects (obstacles) in the environment. We assume that the robot is equipped only with a field programmable gate array device (for processing) and present an algorithm for this problem. We also present an area-efficient architecture. One element of the architecture is the Coordinate Rotation Digital Computer (CORDIC) to facilitate rotation of the robot. Some experiments are also presented. © 2012 IEEE.

Krishnamurthy Sridharan

Department of Electrical Engineering

CO-ORDINATE ROTATION DIGITAL COMPUTERS

FIELD-PROGRAMMABLE GATE ARRAY IMPLEMENTATIONS

Architecture

Field programmable gate arrays (FPGA)

Information Systems

Navigation

ULTRASONIC SENSORS

Mobile robots

IIT Madras is a public technical and research university located in Chennai, Tamil Nadu. Founded in 1959, it is recognised as an Institute of National Importance.

IIT Madras has been ranked as the top engineering institute in India for four years in a row by the National Institutional Ranking Framework of the MHRD

It currently offers undergraduate, postgraduate and research degrees across 16 disciplines in Engineering, Sciences, Humanities and Management. About 596 faculty belonging to science and engineering departments and centres of the Institute are engaged in teaching, research and industrial consultancy.

IIT Madras

2012 IEEE 7th International Conference on Industrial and Information Systems, ICIIS 2012

Sensor-based construction of different geometric structures has been an important development in the domain of autonomous robot navigation. This paper presents a hardware-efficient scheme to construct one such geometric structure, namely, the generalized Voronoi diagram (GVD), using a prediction-and-correction strategy. In this paper, an architecture to construct the GVD for an indoor environment with multiple obstacles whose geometry and location are not known beforehand is presented. A feature of the proposed approach is that it does not involve operations that are expensive in hardware. Furthermore, no explicit angle computation circuitry is needed. An efficient architecture based on hardware reuse is presented. The design is shown to be space efficient and fits in a low-end field-programmable gate-array (FPGA) device (with a small number of system gates). Detailed experiments with a mobile robot fabricated locally with a Xilinx XC2S200E FPGA and eight ultrasonic sensors onboard validate the efficacy of the proposed approach for static as well as dynamic environments. © 2008 IEEE.

IEEE Transactions on Industrial Electronics

Hardware-efficient prediction-correction-based generalized-voronoi-diagram construction and FPGA implementation

Computer

NASA advances robotic space exploration

The density advantage of configurable computing

Hardware-efficient path planning for a mobile robot and FPGA realization

Journal	2012 IEEE 7th International Conference on Industrial and Information Systems, ICIIS 2012
Open Access	No