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Hardware architecture for finding shortest pathsPublished in
2009
The computation of shortest path for a mobile automaton between two points in the plane is considered in this paper. An architecturally-efficient solution based on Dijkstra's algorithm is presented for this problem. Results of implementation in Xilinx FPGA are encouraging: the solution operates at approximately 46 MHz and the implementation for a graph with 64 nodes and 88 edges fits in one XCV3200E-FG1156 device. © 2009 IEEE.
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About the journal
| Journal | IEEE Region 10 Annual International Conference, Proceedings/TENCON |
|---|---|
| Open Access | No |
Authors (1)
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Concepts (11)
DIJKSTRA'S ALGORITHM- DIJKSTRA'S ALGORITHMS
- Hardware architecture
- Shortest path
- Two-point
- XILINX FPGA
- Field programmable gate arrays (fpga)
- Graph theory
- Logic gates
- Wireless sensor networks
- Computational efficiency
