The design of digital circuits in Quantum Dot Cellular Automata (QCA) has been of active interest in the last decade. While there are many proposals for design of adders, work on subtractors is limited. This paper presents efficient QCA designs of single-bit and multi-bit subtractors. The designs are based on new results on majority logic. Simulations in QCADesigner are presented. The complexity of the proposed designs in terms of cell count and area are also given. © 2013 IEEE.

Krishnamurthy Sridharan

Department of Electrical Engineering

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IIT Madras

Efficient QCA design of single-bit and multi-bit subtractors

Proceedings of the IEEE Conference on Nanotechnology

The design of adders on quantum dot cellular automata (QCA) has been of recent interest. While few designs exist, investigations on reduction of QCA primitives (majority gates and inverters) for various adders are limited. In this paper, we present a number of new results on majority logic. We use these results to present efficient QCA designs for the ripple carry adder (RCA) and various prefix adders. We derive bounds on the number of majority gates for n-bit RCA and n-bit rent-Kung, Kogge-Stone, Ladner-Fischer, and Han-Carlson adders. We further show that the Brent-Kung adder has lower delay than the best existing adder designs as well as other prefix adders. In addition, signal integrity and robustness studies show that the proposed Brent-Kung adder is fairly well-suited to changes in time-related parameters as well as temperature. Detailed simulations using QCADesigner are presented. © 2011 IEEE.

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Journal	Proceedings of the IEEE Conference on Nanotechnology
ISSN	19449399
Open Access	No