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An on-chip DNL estimation and reconfiguration for improved linearity in current steering DAC
K. P Sunil Rafeeque,
Published in
2004
Volume: 1
   
Pages: I281 - I284
Abstract
This paper proposes a reconfigurable current steering DAC. It uses an on-chip error estimation. The INL is tuned by optimizing switching sequence. A DAC is designed and fabricated using 0.35μm CMOS technology. The INL improvement is verified both in simulation and actual hardware.
About the journal
JournalProceedings - IEEE International Symposium on Circuits and Systems
ISSN02714310
Open AccessNo
Concepts (12)
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    Algorithms
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    Computer hardware
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    Computer simulation
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    Error analysis
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    Estimation
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    Microprocessor chips
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    Optimization
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    Transfer functions
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    Current steering
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    ERROR ESTIMATION
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    GRADIENT ERRORS
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    Digital to analog conversion