We present a compact model for the quasi-static coupling impedance between two coplanar rectangular contacts, which are misaligned and non-identical, on a bulk substrate. The coupling resistance is modeled as weighted arithmetic mean of the resistances of four aligned identical contact geometries for which a model is available in literature. Our model is scalable with contact dimensions and separation and has been validated against TCAD simulations. © 2016 IEEE.

Shreepad Karmalkar

Department of Electrical Engineering

A. Anvar

Crosstalk

ELECTRIC SIGNAL SYSTEMS

Embedded systems

Compact model

COUPLING RESISTANCE

MIXED-SIGNAL CIRCUITS

SUBSTRATE COUPLINGS

SUBSTRATE NOISE

MIXED SIGNAL INTEGRATED CIRCUITS

IIT Madras is a public technical and research university located in Chennai, Tamil Nadu. Founded in 1959, it is recognised as an Institute of National Importance.

IIT Madras has been ranked as the top engineering institute in India for four years in a row by the National Institutional Ranking Framework of the MHRD

It currently offers undergraduate, postgraduate and research degrees across 16 disciplines in Engineering, Sciences, Humanities and Management. About 596 faculty belonging to science and engineering departments and centres of the Institute are engaged in teaching, research and industrial consultancy.

IIT Madras

A Quasi-Static Model for the Coupling Impedance between Coplanar Rectangular Contacts on a Bulk Substrate

Proceedings of the IEEE International Conference on VLSI Design

A new approach is presented for modeling the resistances of the substrate coupling network employed for noise calculations in the design of mixed-signal and RF ICs. The approach introduces intermediate resistances having progressively simpler current flow patterns than the coupling resistances. Each coupling resistance is then modeled as the product of two resistance ratios and a resistance having simple 1-D vertical or lateral flow, and each resistance ratio is approximated as a simple function of geometrical aspect ratios. Based on this approach, closed-form expressions are derived for coupling resistances associated with parallel stripe contacts on a substrate with or without a bottom contact, in terms of dimensions of the contact configuration and substrate parameters. © 2012 IEEE.

Proceedings - International Symposium on Quality Electronic Design, ISQED

A scalable curve-fit model of the substrate coupling resistances for IC design

We derive a closed-form quasi-static model for the coupling impedance between aligned coplanar rectangular contacts on bulk and epitaxial semiconductor substrates by resolving the 3-D field lines into simpler components (vertical, lateral, fringing, 2-D, etc.). Both insulating and conducting (grounded or floating) backplane conditions are considered. Our model reflects all the geometry and process parameters, and its constants are process independent and universal. The model also gives the capacitive coupling via ambient, i.e., via the region outside the substrate, and specifies conditions under which a given thickness or lateral extension of the substrate can be regarded as infinite. Comparisons with technology computer-aided design simulations and measurements validate the model over a wide range of width/length and width/separation ratios of the contacts. © 2012 IEEE.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Quasi-static compact model for coupling between aligned contacts on finite substrates with insulating or conducting backplanes

3D TCAD Simulation for CMOS Nanoeletronic Devices

Introduction of Synopsys Sentaurus TCAD Simulation

IEEE Transactions on Electron Devices

A Unified Method for Calculating Capacitive and Resistive Coupling Exploiting Geometry Constraints on Lightly and Heavily Doped CMOS Processes

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

Compact substrate models for efficient noise coupling and signal isolation analysis

Journal	Data powered by TypesetProceedings of the IEEE International Conference on VLSI Design
Publisher	Data powered by TypesetIEEE Computer Society
ISSN	10639667
Open Access	No