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Reduced charge trapping in GaN MIS using gate oxide deposition technique
Turuvekere Sreenidhi, ,
Published in
2009
Volume: 45
   
Issue: 10
Pages: 527 - 528
Abstract
A novel gate oxide deposition technique, thermal oxidation of deposited silicon (thermal-oxide), to realise a metal insulator semiconductor (MIS) structure on GaN is reported. Reduced gate leakage current and less flat-band voltage drift are achieved compared to plasma enhanced chemical vapour deposition to SiO2 deposited on GaN. The deposition and oxidation conditions have been optimised to achieve a high quality oxide/GaN interface. © The Institution of Engineering and Technology 2009.
About the journal
JournalElectronics Letters
ISSN00135194
Open AccessNo
Concepts (23)
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    Flat-band voltage
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    GATE OXIDE DEPOSITION
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    Gate-leakage current
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    High quality
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    Metal insulator semiconductor structures
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    OXIDATION CONDITIONS
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    PLASMA ENHANCED CHEMICAL VAPOUR DEPOSITION
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    Thermal oxidation
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    Charge trapping
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    Gallium alloys
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    Gallium nitride
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    Gate dielectrics
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    Gates (transistor)
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    Metal insulator boundaries
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    Mis devices
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    Oxidation
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    Plasma enhanced chemical vapor deposition
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    Semiconducting gallium
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    Semiconducting silicon
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    Silicon compounds
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    Silicon oxides
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    Switching circuits
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    Plasma deposition