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New layout dependency in high-k/metal gate MOSFETsPublished in IEEE
2011
We report a new N/PFET Gate Patterning Boundary Proximity layout dependent effect in high-k dielectric/Metal Gate (HK/MG) MOSFETs which causes anomalous threshold voltage (Vt) modulation for the first time. We investigated the mechanism by using special test structures and process optimizations to suppress this layout dependency. Finally, we achieved the best over all process optimization which makes it possible to suppress layout dependency without degrading FET performance/yield/reliability. © 2011 IEEE.
Topics: Metal gate (57)%57% related to the paper, MOSFET (52)%52% related to the paper and High-κ dielectric (51)%51% related to the paper
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About the journal
| Journal | Data powered by TypesetTechnical Digest - International Electron Devices Meeting, IEDM |
|---|---|
| Publisher | Data powered by TypesetIEEE |
| ISSN | 01631918 |
| Open Access | No |
Authors (1)
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