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Limiting negations in bounded treewidth and upward planar circuits
, He J., Liang H.
Published in Springer
2010
Volume: 6281 LNCS
   
Pages: 417 - 428
Abstract
The decrease of a Boolean function f : 0,1n →0,1, denoted by d(f) is the maximum number of inverse indices in any increasing chain of inputs, where i is an inverse index if f(xi) > f(x i+1). It follows from a theorem of Markov (JACM 1958) that the minimum number of negation gates in a circuit necessary and sufficient to compute any Boolean function f is ⌈log(d(f) + 1)⌉. A recent result due to Morizumi (ICALP 2009) proves that d(f) negations are necessary and sufficient when the computation is done by formulas. We explore the situation in between formulas (directed trees) and general circuits (DAGs), and related models. We obtain the following results: 1. We argue that for any Boolean function f, there is a circuit computing f, that uses ⌈log(d(f) + 1)⌉ negations and has treewidth at most ⌈log(d(f) + 1)⌉ + 1. For 1 ≤ k ≤ ⌈log(d(f) + 1)⌉, we prove that d(f)·8k/2k negations are sufficient to compute any Boolean function f by circuits of treewidth at most k. Moreover, if there is a circuit family of size s = s(n) and treewidth k = k(n) computing fn, then there exists a circuit family of size s·nO(1)·2 O(min k,log n) and treewidth at most 2k which computes f n and contains O(max nk/22k,log n) negation gates. 2. We obtain tight bounds on the number of negation gates required to compute specific functions such as Parity2, Parity2 and Invertern by one-input-face upward planar circuits. We extend these lower bounds to a larger class of functions (which also includes natural functions like Add and Subtract) and we show a direct sum theorem for this class with respect to the number of negations. 3. We demonstrate the limitations of the one-input-face constraint in the upward planar circuits by showing the explicit function which can be computed by a monotone upward planar circuit, but cannot be computed by any montone one-input-face upward planar circuit. 4. We prove that for every Boolean function f, there exists a multilective upward planar circuit which uses at most ⌈d(f)+1/2⌉ negation gates for computing f. © 2010 Springer-Verlag.
About the journal
JournalData powered by TypesetLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
PublisherData powered by TypesetSpringer
ISSN03029743
Open AccessNo