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Ge n+/p junctions using temperature-based phosphorous implantation
P. Bhatt, P. Swarnkar, , J. Biswas, S. Lodha
Published in IEEE Computer Society
2014
Pages: 31 - 32
Abstract
This work compares the impact of implantation temperature ranging from cryogenic (-100 °C) to hot (400°C) on the performance of n+/p Ge junctions. Cryogenic implantation on bulk, planar Ge followed by a 400°C rapid thermal anneal leads to higher activation. lower junction depth, lower sheet resistance and lower junction leakage compared to RT and hot (400°C) implantation. The improved junction performance translates into higher ON current and lower OFF leakage for cryo implanted planar Ge n-MOSFETs. On the other hand, high dose/energy cryogenic implants on Ge fins are shown to degrade fin recrystallization due to the absence of a crystalline core because of increased amorphization. Crystallinity of as-implanted Ge fins indicates that hot implantation could be a more viable n+/p junction formation process for Ge FinFET technology. © 2014 IEEE.
About the journal
JournalData powered by Typeset2014 7th International Silicon-Germanium Technology and Device Meeting, ISTDM 2014
PublisherData powered by TypesetIEEE Computer Society