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Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting
Published in Institute of Electrical and Electronics Engineers Inc.
2019
Volume: 54
   
Issue: 9
Pages: 2590 - 2600
Abstract
The full-wave rectifier is the most straightforward way of extracting energy from a piezoelectric source. Unfortunately, the inherent capacitance of the piezoelement significantly limits the efficiency of extraction. The bias-flip rectifier, which aims to mitigate this problem, not only needs a large inductor for efficient operation, but also needs the generation of pulses with a precisely defined ontime. A large inductor increases the overall volume of the system. We present the multi-stage bias-flip rectifier, which is a technique that achieves a high voltage-flip efficiency using a much smaller inductor, and relaxes timing-accuracy requirements. The rectifier, implemented in a 130-nm CMOS process, dissipates about 2 μW and achieves a voltage-flip efficiency of 89.5% while using only a 47 μH inductor. © 1966-2012 IEEE.
About the journal
JournalData powered by TypesetIEEE Journal of Solid-State Circuits
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.
ISSN00189200
Open AccessNo
Concepts (15)
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    Bias voltage
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    Capacitance
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    Electric inductors
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    Energy harvesting
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    Piezoelectricity
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    Rectifying circuits
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    BIAS-FLIP RECTIFIER
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    Cmos processs
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    FULL-WAVE RECTIFIERS
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    Multi-step
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    PIEZO ELEMENTS
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    Piezoelectric energy harvesting
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    PIEZOELECTRIC HARVESTER
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    SYNCHRONIZED SWITCH HARVESTING
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    Electric rectifiers