Header menu link for other important links
X
Alias rejection of continuous-time ΔΣ modulators with switched-capacitor feedback DACs
Published in Institute of Electrical and Electronics Engineers Inc.
2011
Volume: 58
   
Issue: 2
Pages: 233 - 243
Abstract
Continuous-time ΔΣ modulators (CTDSMs) with switched-capacitor (SC) feedback digital-to-analog converters (DACs) are relatively less sensitive to clock jitter when compared to converters that use non-return-to-zero feedback DACs. However, as we show in this paper, using an SC DAC can seriously compromise the alias rejection of the modulator, thereby nullifying one of the principal advantages of continuous-time operation. We give an intuitive understanding, as well as an analytical basis, for computing the signal transfer function of CTDSMs with SC DACs. We propose power-efficient circuit techniques to improve alias rejection in such modulators and give experimental results that illustrate some of our ideas. © 2011 IEEE.
About the journal
JournalData powered by TypesetIEEE Transactions on Circuits and Systems I: Regular Papers
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.
ISSN15498328
Open AccessNo
Concepts (20)
  •  related image
    Aliasing
  •  related image
    ANALOGDIGITAL (A/D) CONVERSION
  •  related image
    ASSISTED OPAMP
  •  related image
    Continuous time
  •  related image
    DIGITAL-TO-ANALOG CONVERSION (DAC)
  •  related image
    Feed-forward
  •  related image
    NRZ
  •  related image
    Over sampling
  •  related image
    Rejection
  •  related image
    Sigma-delta
  •  related image
    Switched capacitor
  •  related image
    Time varying
  •  related image
    Anti-aliasing
  •  related image
    Capacitors
  •  related image
    Continuous time systems
  •  related image
    Digital integrated circuits
  •  related image
    Jitter
  •  related image
    MODULATORS
  •  related image
    Operational amplifiers
  •  related image
    Analog to digital conversion