An accurate closed-form analytical model is proposed to predict the junction temperature and thermal resistance of silicon germanium heterojunction bipolar transistors, including the effect of back-end-of-line (BEOL) metal layers. A linear approximation is used in a thermal resistivity model of silicon to reduce the model complexity. A simple method is proposed to extract the necessary model parameters along with the BEOL thermal resistance. The model is validated with the TCAD simulation, and the scalability of the model is verified by the comparison with experimental data for different device geometries. The model shows excellent agreement with both TCAD simulation (without BEOL) and experimental data (with BEOL). © 1963-2012 IEEE.