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A novel method for online in-place detection and location of multiple interconnect faults in SRAM based FPGAs
Aditya S. Ramani,
Published in IEEE Computer Society
2003
Volume: 2003-January
   
Pages: 262 - 265
Abstract
This paper describes a novel method for online in-place detection and location of interconnects faults in SRAM-based FPGA systems. In safety critical systems like space probes, online checkers report misbehavior of sub-circuits within the system. When one such sub-circuit is reported to misbehave, the algorithm proposed in this paper performs run time reconfiguration (RTR) of LUTs in an attempt to detect and locate the interconnect faults, if any, within the faulty sub-circuit. Even in the subcircuit under test, at any given time, only a small section of the LUTs are used by the testing procedure. In this way the degradation of the application is kept at a minimum. The proposed algorithm is in-place, i.e. it does not alter the routing structure of the application. © 2003 IEEE.
About the journal
JournalData powered by TypesetProceedings of the Asian Test Symposium
PublisherData powered by TypesetIEEE Computer Society
ISSN10817735
Open AccessNo
Concepts (11)
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    Field programmable gate arrays (fpga)
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    Online systems
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    Reconfigurable hardware
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    INTERCONNECT FAULTS
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    ROUTING STRUCTURES
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    RUN-TIME RECONFIGURATION
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    Safety critical systems
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    SRAM-BASED FPGA
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    Sub-circuits
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    TESTING PROCEDURE
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    Fault detection