Header menu link for other important links
80Kb 10ns read cycle logic Embedded High-K charge trap Multi-Time-Programmable Memory scalable to 14nm FIN with no added process complexity
, Leu D., , Cestero A., Kilker R., Yin M., Golz J., Tummuru R.R., , Moy D.Show More
Published in Institute of Electrical and Electronics Engineers Inc.
Volume: 2016-September
An 80Kb logic Embedded Multi-Time Programmable Memory (MTPM) employs charge trapping and de-trapping behavior in 32nm/22nm High-K transistor, resulting in no added process complexity. Multi-step verification with overwrite protection employs block-write and signal margin degradation (∼30%) to satisfy 10 year retention at 105° C. © 2016 IEEE.
About the journal
JournalData powered by TypesetIEEE Symposium on VLSI Circuits, Digest of Technical Papers
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.
Open AccessNo